Verilog MCQ

Below Verilog quiz are Multiple Choice Questions (MCQs) type Quiz. These Verilog MCQ Questions helps you to refresh your Verilog, you can see the correct option by clicking on it. .
  • 1. In most synthesis tools, what will happen when a signal that is needed in a sensitivity list is not included?

    • An error will be generated and the code cannot be synthesized
    • A warning message will be generated and the code will be synthesized but the resulting netlist will not provide the desired results
    • The synthesis tool will ignore the sensitivity list since all objects that are read as part of a procedural assignment statement are considered to be sensitive
    • There will be no effect on the design and pre-synthesis simulation will be consistent with post-synthesis simulation
  • 2. reg [4:1] pwm will initialize variable of _______ bits

    • 3
    • 4
    • 5
    • 6
  • 3. Which is illegal in writing comments in verilog?

    • Embedding one-line comments in multiple-line comments
    • Embedding multiple-line comments in multiple-line comments
    • Embedding one-line comments after ;
    • all of the given
  • 4. Verilog may be written at the

    • Behavioral level
    • Structural level
    • dataflow level
    • All the above
  • 5. Default value of a reg data type is ___.

    • 0
    • 1
    • x
    • z
  • 6. The input and output ports should be declared inside the ________

    • Module
    • Case
    • wire
    • None of the above
  • 7. Which level of design abstraction requires logic circuit to write the Verilog HDL?

    • Gate level
    • Data flow
    • Behavioural
    • none
  • 8. The Verilog HDL code starts with the keyword_________

    • always
    • module
    • endmodule
    • items
  • 9. The most appropriate modeling style to implement Traffic light controller will be

    • Dataflow
    • Structural
    • Behavioral
    • Switch
  • 10. If in1 = 4’b101x and in2 = 4’b0101 then in1 + in2 equals

    • 0111
    • x
    • 0110
    • None of these
  • 11. The keyword used for multiplying two bits in the form of gates is __________

    • AND
    • Or
    • and
    • none
  • 12. Which of the following is a difference between a Function and a Task?

    • A Function can call another function; a Task cannot
    • A Function cannot call a task; a Task can call another task
    • A Function has one or more inputs; a Task has no inputs
    • A Function argument may be an output; a Task’s argument may only be an input